How does hardware timestamp counter ensure commit ordering?
Traditionally, we relied on a central "Sequence Generator" (a software bottleneck) or NTP (a high-jitter network protocol). In 2026, we solve this at the silicon level using the Hardware Timestamp Counter (TSC).
The TSC is a 64-bit register in every modern CPU (x86 RDTSC or ARM CNTVCT) that counts the number of clock cycles since the processor was reset.
The Speed: It increments at the CPU’s base frequency (e.g., 3.0 GHz).
The Precision: It provides sub-nanosecond resolution.
The Cost: Reading the TSC takes about 15–20 clock cycles, making it orders of magnitude faster than a system call to the OS clock.
In the past, the TSC was dangerous because it varied with CPU frequency (SpeedStep/Turbo Boost) or drifted between different CPU cores.
The 2026 Standard: Modern CPUs provide an Invariant TSC.
Fixed Frequency: The counter increments at a constant rate regardless of the actual CPU clock speed.
Synchronized across Cores: Hardware-level "backplane" synchronization ensures that Core 0 and Core 127 see the exact same value at the exact same time.
When a transaction is ready to commit in a 1M TPS environment, the database engine performs a TSC-based Order:
As the COMMIT instruction is executed, the CPU performs an RDTSCP (Read Timestamp Counter and Processor ID). This captures the time and ensures that instructions aren't reordered by the CPU's "Out-of-Order" execution engine.
In Oracle or similar high-scale DBs, the System Change Number is mapped to this hardware TSC.
Transaction A: Gets TSC 1000000001
Transaction B: Gets TSC 1000000005
Even if these transactions happen on different cores, the hardware guarantee of TSC invariance ensures that B is globally recognized as "after" A.
When a commit spans multiple servers (a Distributed Transaction), we combine the TSC with RDMA (Remote Direct Memory Access).
Remote Read: Server 1 reads the TSC of Server 2 over the RoCE fabric.
Offset Calculation: The system calculates the constant "Network Offset" between the two hardware clocks.
The "Commit Wait": Just like Google Spanner's TrueTime (but at the microsecond level), the database waits for the duration of the clock uncertainty before finalizing the commit. This ensures that a transaction on Server 2 cannot "sneak in" before a finished transaction on Server 1.
| Metric | Software Clock (gettimeofday) | Hardware TSC (RDTSC) |
| Precision | Microseconds | Nanoseconds |
| Overhead | High (Context switch to Kernel) | Ultra-Low (Single instruction) |
| Consistency | Subject to NTP "steps" or slews | Monotonic and Invariant |
| 1M TPS Fit | Causes "bottleneck jitter" | Enables Linear Scaling |
At 1M TPS, software-based timekeeping is a relic. By utilizing the Hardware Timestamp Counter, you turn every CPU core in your cluster into a high-precision, synchronized atomic clock. This allows the database to order millions of commits per second with zero central contention, ensuring that "the order of events" remains absolute, even at the limits of silicon speed.